PIC16C54C-04/SS【PDF 103/194 页】IC MCU OTP 512X12 20SSOP

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Sheet目录3883

99页 100页 101页 102页 [103页]104页 105页 106页 107页

PIC18F2450/4450

2006 Microchip Technology Inc.

Advance Information

DS39760A-page 189

18.0

SPECIAL FEATURES OF THE

CPU

PIC18F2450/4450 devices include several features

intended to maximize reliability and minimize cost

through elimination of external components. These are:

Oscillator Selection

Resets:

- Power-on Reset (POR)

- Power-up Timer (PWRT)

- Oscillator Start-up Timer (OST)

- Brown-out Reset (BOR)

Interrupts

Watchdog Timer (WDT)

Fail-Safe Clock Monitor

Two-Speed Start-up

Code Protection

ID Locations

In-Circuit Serial Programming

The oscillator can be configured for the application

depending on frequency, power, accuracy and cost. All

of the options are discussed in detail in Section 2.0

“Oscillator Configurations”.

A complete discussion of device Resets and interrupts

is available in previous sections of this data sheet.

In addition to their Power-up and Oscillator Start-up

Timers provided for Resets, PIC18F2450/4450 devices

have a Watchdog Timer, which is either permanently

enabled via the Configuration bits or software controlled

(if configured as disabled).

The inclusion of an internal RC oscillator also provides

the additional benefits of a Fail-Safe Clock Monitor

(FSCM) and Two-Speed Start-up. FSCM provides for

background monitoring of the peripheral clock and

automatic switchover in the event of its failure. Two-

Speed Start-up enables code to be executed almost

immediately on start-up, while the primary clock source

completes its start-up delays.

All of these features are enabled and configured by

setting the appropriate Configuration register bits.

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